
typedef enum { DIR, REL, INH, IMM, EXT, IX, IX1, IX2, X} admod;

typedef struct {
		char *opname,
		int	len,
		admod mode
	} op;
/* 0 */		{"BRSET0", 3, DIR}, {"BRCLR0", 3, DIR}, {"BRSET1", 3, DIR}, {"BRCLR1", 3, DIR}, {"BRSET2", 3, DIR}, {"BRCLR2", 3, DIR}, {"BRSET3", 3, DIR}, {"BRCLR3", 3, DIR}, {"BRSET4", 3, DIR}, {"BRCLR4", 3, DIR}, {"BRSET5", 3, DIR}, {"BRCLR5", 3, DIR}, {"BRSET6", 3, DIR}, {"BRCLR6", 3, DIR}, {"BRSET7", 3, DIR}, {"BRCLR7", 3, DIR},
/* 1 */		{"BSET0", 2, DIR}, {"BCLR0", 2, DIR}, {"BSET1", 2, DIR}, {"BCLR1", 2, DIR}, {"BSET2", 2, DIR}, {"BCLR2", 2, DIR}, {"BSET3", 2, DIR}, {"BCLR3", 2, DIR}, {"BSET4", 2, DIR}, {"BCLR4", 2, DIR}, {"BSET5", 2, DIR}, {"BCLR5", 2, DIR}, {"BSET6", 2, DIR}, {"BCLR6", 2, DIR}, {"BSET7", 2, DIR}, {"BCLR7", 2, DIR},
/* 2 */		{"BRA", 2, REL}, {"BRN", 2, REL}, {"BHI", 2, REL}, {"BLS", 2, REL}, {"BCC", 2, REL}, {"BCS", 2, REL}, {"BNE", 2, REL}, {"BEQ", 2, REL}, {"BHCC", 2, REL}, {"BHCS", 2, REL}, {"BPL", 2, REL}, {"BMI", 2, REL}, {"BMC", 2, REL}, {"BMS", 2, REL}, {"BIL", 2, REL}, {"BIH", 2, REL},
/* 3 */		{"NEG", 2, DIR}, {"CBEQ", 3, DIR}, {"X", 0, X}, {"COM", 2, DIR}, {"LSR", 2, DIR}, {"STHX", 2, DIR}, {"ROR", 2, DIR}, {"ASR", 2, DIR}, {"LSL", 2, DIR}, {"ROL", 2, DIR}, {"DEC", 2, DIR}, {"DBNZ", 3, DIR}, {"INC", 2, DIR}, {"TST", 2, DIR}, {"X", 0, X}, {"CLR", 2, DIR},
/* 4 */		{"NEGA", 1, INH}, {"CBEQA", 3, IMM}, {"MUL", 1, INH}, {"COMA", 1, INH}, {"LSRA", 1, INH}, {"LDHX", 3, IMM}, {"RORA", 1, INH}, {"ASRA", 1, INH}, {"LSLA", 1, INH}, {"ROLA", 1, INH}, {"DECA", 1, INH}, {"DBNZA", 2, INH}, {"INCA", 1, INH}, {"TSTA", 1, INH}, {"MOV", 3, DD}, {"CLRA", 1, INH},
/* 5 */		{"NEGX", 1, INH}, {"CBEQX", 3, IMM}, {"DIV", 1, INH}, {"COMX", 1, INH}, {"LSRX", 1, INH}, {"LDHX", 2, DIR}, {"RORX", 1, INH}, {"ASRX", 1, INH}, {"LSLX", 1, INH}, {"ROLX", 1, INH}, {"DECX", 1, INH}, {"DBNZX", 2, INH}, {"INCX", 1, INH}, {"TSTX", 1, INH}, {"MOV", 2, DIX+}, {"CLRX", 1, INH},
/* 6 */		{"NEG", 2, IX1}, {"CBEQ", 3, IX1+}, {"NSA", 1, INH}, {"COM", 2, IX1}, {"LSR", 2, IX1}, {"CPHX", 3, IMM}, {"ROR", 2, IX1}, {"ASR", 2, IX1}, {"LSL", 2, IX1}, {"ROL", 2, IX1}, {"DEC", 2, IX1}, {"DBNZ", 3, IX1}, {"INC", 2, IX1}, {"TST", 2, IX1}, {"MOV", 3, IMD}, {"CLR", 2, IX1},
/* 7 */		{"NEG", 1, IX}, {"CBEQ", 2, IX+}, {"DAA", 1, INH}, {"COM", 1, IX}, {"LSR", 1, IX}, {"CPHX", 2, DIR}, {"ROR", 1, IX}, {"ASR", 1, IX}, {"LSL", 1, IX}, {"ROL", 1, IX}, {"DEC", 1, IX}, {"DBNZ", 2, IX}, {"INC", 1, IX}, {"TST", 1, IX}, {"MOV", 2, IX+D}, {"CLR", 1, IX},
/* 8 */		{"RTI", 1, INH}, {"RTS", 1, INH}, {"X", 0, X}, {"SWI", 1, INH}, {"TAP", 1, INH}, {"TPA", 1, INH}, {"PULA", 1, INH}, {"PSHA", 1, INH}, {"PULX", 1, INH}, {"PSHX", 1, INH}, {"PULH", 1, INH}, {"PSHH", 1, INH}, {"CLRH", 1, INH}, {"X", 0, X}, {"STOP", 1, INH}, {"WAIT", 1, INH},
/* 9 */		{"BGE", 2, REL}, {"BLT", 2, REL}, {"BGT", 2, REL}, {"BLE", 2, REL}, {"TXS", 1, INH}, {"TSX", 1, INH}, {"X", 0, X}, {"TAX", 1, INH}, {"CLC", 1, INH}, {"SEC", 1, INH}, {"CLI", 1, INH}, {"SEI", 1, INH}, {"RSP", 1, INH}, {"NOP", 1, INH}, {"X", 0, X}, {"TXA", 1, INH},
/* A */		{"SUB", 2, IMM}, {"CMP", 2, IMM}, {"SBC", 2, IMM}, {"CPX", 2, IMM}, {"AND", 2, IMM}, {"BIT", 2, IMM}, {"LDA", 2, IMM}, {"AIS", 2, IMM}, {"EOR", 2, IMM}, {"ADC", 2, IMM}, {"ORA", 2, IMM}, {"ADD", 2, IMM}, {"X", 0, X}, {"BSR", 2, REL}, {"LDX", 2, IMM}, {"AIX", 2, IMM},
/* B */		{"SUB", 2, DIR}, {"CMP", 2, DIR}, {"SBC", 2, DIR}, {"CPX", 2, DIR}, {"AND", 2, DIR}, {"BIT", 2, DIR}, {"LDA", 2, DIR}, {"STA", 2, DIR}, {"EOR", 2, DIR}, {"ADC", 2, DIR}, {"ORA", 2, DIR}, {"ADD", 2, DIR}, {"JMP", 2, DIR}, {"JSR", 2, DIR}, {"LDX", 2, DIR}, {"STX", 2, DIR},
/* C */		{"SUB", 3, EXT}, {"CMP", 3, EXT}, {"SBC", 3, EXT}, {"CPX", 3, EXT}, {"AND", 3, EXT}, {"BIT", 3, EXT}, {"LDA", 3, EXT}, {"STA", 3, EXT}, {"EOR", 3, EXT}, {"ADC", 3, EXT}, {"ORA", 3, EXT}, {"ADD", 3, EXT}, {"JMP", 3, EXT}, {"JSR", 3, EXT}, {"LDX", 3, EXT}, {"STX", 3, EXT},
/* D */		{"SUB", 3, IX2}, {"CMP", 3, IX2}, {"SBC", 3, IX2}, {"CPX", 3, IX2}, {"AND", 3, IX2}, {"BIT", 3, IX2}, {"LDA", 3, IX2}, {"STA", 3, IX2}, {"EOR", 3, IX2}, {"ADC", 3, IX2}, {"ORA", 3, IX2}, {"ADD", 3, IX2}, {"JMP", 3, IX2}, {"JSR", 3, IX2}, {"LDX", 3, IX2}, {"STX", 3, IX2},
/* E */		{"SUB", 2, IX1}, {"CMP", 2, IX1}, {"SBC", 2, IX1}, {"CPX", 2, IX1}, {"AND", 2, IX1}, {"BIT", 2, IX1}, {"LDA", 2, IX1}, {"STA", 2, IX1}, {"EOR", 2, IX1}, {"ADC", 2, IX1}, {"ORA", 2, IX1}, {"ADD", 2, IX1}, {"JMP", 2, IX1}, {"JSR", 2, IX1}, {"LDX", 2, IX1}, {"STX", 2, IX1},
/* F */		{"SUB", 1, IX}, {"CMP", 1, IX}, {"SBC", 1, IX}, {"CPX", 1, IX}, {"AND", 1, IX}, {"BIT", 1, IX}, {"LDA", 1, IX}, {"STA", 1, IX}, {"EOR", 1, IX}, {"ADC", 1, IX}, {"ORA", 1, IX}, {"ADD", 1, IX}, {"JMP", 1, IX}, {"JSR", 1, IX}, {"LDX", 1, IX}, {"STX", 1, IX},
/* 9E6 */		{"NEG", 3, SP1}, {"CBEQ", 4, SP1}, {"X", 0, X}, {"COM", 3, SP1}, {"LSR", 3, SP1}, {"X", 0, X}, {"ROR", 3, SP1}, {"ASR", 3, SP1}, {"LSL", 3, SP1}, {"ROL", 3, SP1}, {"DEC", 3, SP1}, {"DBNZ", 4, SP1}, {"INC", 3, SP1}, {"TST", 3, SP1}, {"X", 0, X}, {"CLR", 3, SP1},
/* 9ED */		{"SUB", 4, SP2}, {"CMP", 4, SP2}, {"SBC", 4, SP2}, {"CPX", 4, SP2}, {"AND", 4, SP2}, {"BIT", 4, SP2}, {"LDA", 4, SP2}, {"STA", 4, SP2}, {"EOR", 4, SP2}, {"ADC", 4, SP2}, {"ORA", 4, SP2}, {"ADD", 4, SP2}, {"X", 0, X}, {"X", 0, X}, {"LDX", 4, SP2}, {"STX", 4, SP2},
/* 9EE */		{"SUB", 3, SP1}, {"CMP", 3, SP1}, {"SBC", 3, SP1}, {"CPX", 3, SP1}, {"AND", 3, SP1}, {"BIT", 3, SP1}, {"LDA", 3, SP1}, {"STA", 3, SP1}, {"EOR", 3, SP1}, {"ADC", 3, SP1}, {"ORA", 3, SP1}, {"ADD", 3, SP1}, {"X", 0, X}, {"X", 0, X}, {"LDX", 3, SP1}, {"STX", 3, SP1},
